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<div class="header">
  <div class="headertitle"><div class="title">HAL RCC Aliased maintained for legacy purpose </div></div>
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<div class="contents">
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-define-members" class="groupheader"><a id="define-members" name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga8345b485e0da9e4ec2a8200542a7be51" id="r_ga8345b485e0da9e4ec2a8200542a7be51"><td class="memItemLeft" align="right" valign="top"><a id="ga8345b485e0da9e4ec2a8200542a7be51" name="ga8345b485e0da9e4ec2a8200542a7be51"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_StopWakeUpClock_MSI</b>&#160;&#160;&#160;RCC_STOP_WAKEUPCLOCK_MSI</td></tr>
<tr class="memitem:ga5dacddfb5b03063cbee8f75e992cea2d" id="r_ga5dacddfb5b03063cbee8f75e992cea2d"><td class="memItemLeft" align="right" valign="top"><a id="ga5dacddfb5b03063cbee8f75e992cea2d" name="ga5dacddfb5b03063cbee8f75e992cea2d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_StopWakeUpClock_HSI</b>&#160;&#160;&#160;RCC_STOP_WAKEUPCLOCK_HSI</td></tr>
<tr class="memitem:gaf922427772f235d505406232d98de18c" id="r_gaf922427772f235d505406232d98de18c"><td class="memItemLeft" align="right" valign="top"><a id="gaf922427772f235d505406232d98de18c" name="gaf922427772f235d505406232d98de18c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>HAL_RCC_CCSCallback</b>&#160;&#160;&#160;HAL_RCC_CSSCallback</td></tr>
<tr class="memitem:gac6eb1ec87a15e51601d0957fdf17e870" id="r_gac6eb1ec87a15e51601d0957fdf17e870"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#gac6eb1ec87a15e51601d0957fdf17e870">HAL_RC48_EnableBuffer_Cmd</a>(cmd)</td></tr>
<tr class="memitem:ga0b7b1fa138a7e4d601466f5b427579cd" id="r_ga0b7b1fa138a7e4d601466f5b427579cd"><td class="memItemLeft" align="right" valign="top"><a id="ga0b7b1fa138a7e4d601466f5b427579cd" name="ga0b7b1fa138a7e4d601466f5b427579cd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_ADC_CLK_DISABLE</td></tr>
<tr class="memitem:ga3c9e07dfc357910bdd8241d83e1ab404" id="r_ga3c9e07dfc357910bdd8241d83e1ab404"><td class="memItemLeft" align="right" valign="top"><a id="ga3c9e07dfc357910bdd8241d83e1ab404" name="ga3c9e07dfc357910bdd8241d83e1ab404"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_ADC_CLK_ENABLE</td></tr>
<tr class="memitem:gaea979d2b065299f4699d49fbf7dc1162" id="r_gaea979d2b065299f4699d49fbf7dc1162"><td class="memItemLeft" align="right" valign="top"><a id="gaea979d2b065299f4699d49fbf7dc1162" name="gaea979d2b065299f4699d49fbf7dc1162"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_ADC_CLK_SLEEP_DISABLE</td></tr>
<tr class="memitem:gac919ab7c7218c3d5be119a7a66727cf8" id="r_gac919ab7c7218c3d5be119a7a66727cf8"><td class="memItemLeft" align="right" valign="top"><a id="gac919ab7c7218c3d5be119a7a66727cf8" name="gac919ab7c7218c3d5be119a7a66727cf8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_ADC_CLK_SLEEP_ENABLE</td></tr>
<tr class="memitem:gac2ca60c797339b8fb2407e1cd19268b7" id="r_gac2ca60c797339b8fb2407e1cd19268b7"><td class="memItemLeft" align="right" valign="top"><a id="gac2ca60c797339b8fb2407e1cd19268b7" name="gac2ca60c797339b8fb2407e1cd19268b7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_ADC_FORCE_RESET</td></tr>
<tr class="memitem:ga2d1f1b26b6536e9c64d5aadc3477166b" id="r_ga2d1f1b26b6536e9c64d5aadc3477166b"><td class="memItemLeft" align="right" valign="top"><a id="ga2d1f1b26b6536e9c64d5aadc3477166b" name="ga2d1f1b26b6536e9c64d5aadc3477166b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_ADC_RELEASE_RESET</td></tr>
<tr class="memitem:ga6506d98e0a44a0fd83fc893acdea24b6" id="r_ga6506d98e0a44a0fd83fc893acdea24b6"><td class="memItemLeft" align="right" valign="top"><a id="ga6506d98e0a44a0fd83fc893acdea24b6" name="ga6506d98e0a44a0fd83fc893acdea24b6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC1_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_ADC1_CLK_DISABLE</td></tr>
<tr class="memitem:ga9a9d5243d8f3d6747cfbb026fdf2e0b7" id="r_ga9a9d5243d8f3d6747cfbb026fdf2e0b7"><td class="memItemLeft" align="right" valign="top"><a id="ga9a9d5243d8f3d6747cfbb026fdf2e0b7" name="ga9a9d5243d8f3d6747cfbb026fdf2e0b7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC1_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_ADC1_CLK_ENABLE</td></tr>
<tr class="memitem:ga74c96fb6dcb3e5ac23637040874f742a" id="r_ga74c96fb6dcb3e5ac23637040874f742a"><td class="memItemLeft" align="right" valign="top"><a id="ga74c96fb6dcb3e5ac23637040874f742a" name="ga74c96fb6dcb3e5ac23637040874f742a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC1_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_ADC1_FORCE_RESET</td></tr>
<tr class="memitem:ga58dc5da806adc545da8e62b986f6c4f4" id="r_ga58dc5da806adc545da8e62b986f6c4f4"><td class="memItemLeft" align="right" valign="top"><a id="ga58dc5da806adc545da8e62b986f6c4f4" name="ga58dc5da806adc545da8e62b986f6c4f4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC1_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_ADC1_RELEASE_RESET</td></tr>
<tr class="memitem:ga9ce0348811aae0a082ef462e050bdbfa" id="r_ga9ce0348811aae0a082ef462e050bdbfa"><td class="memItemLeft" align="right" valign="top"><a id="ga9ce0348811aae0a082ef462e050bdbfa" name="ga9ce0348811aae0a082ef462e050bdbfa"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC1_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_ADC1_CLK_SLEEP_ENABLE</td></tr>
<tr class="memitem:gab6f5f7285730b9e581578c27eb407246" id="r_gab6f5f7285730b9e581578c27eb407246"><td class="memItemLeft" align="right" valign="top"><a id="gab6f5f7285730b9e581578c27eb407246" name="gab6f5f7285730b9e581578c27eb407246"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC1_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_ADC1_CLK_SLEEP_DISABLE</td></tr>
<tr class="memitem:gae27221f87c3db8c7e520cd404e530a49" id="r_gae27221f87c3db8c7e520cd404e530a49"><td class="memItemLeft" align="right" valign="top"><a id="gae27221f87c3db8c7e520cd404e530a49" name="gae27221f87c3db8c7e520cd404e530a49"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC2_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_ADC2_CLK_DISABLE</td></tr>
<tr class="memitem:ga926fc527f079e5e0b3c57b899d32188c" id="r_ga926fc527f079e5e0b3c57b899d32188c"><td class="memItemLeft" align="right" valign="top"><a id="ga926fc527f079e5e0b3c57b899d32188c" name="ga926fc527f079e5e0b3c57b899d32188c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC2_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_ADC2_CLK_ENABLE</td></tr>
<tr class="memitem:ga8fff7cb98695cd6db61d658e07b3f7a0" id="r_ga8fff7cb98695cd6db61d658e07b3f7a0"><td class="memItemLeft" align="right" valign="top"><a id="ga8fff7cb98695cd6db61d658e07b3f7a0" name="ga8fff7cb98695cd6db61d658e07b3f7a0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC2_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_ADC2_FORCE_RESET</td></tr>
<tr class="memitem:ga950dedd481bcb1024279b78abc7f80d9" id="r_ga950dedd481bcb1024279b78abc7f80d9"><td class="memItemLeft" align="right" valign="top"><a id="ga950dedd481bcb1024279b78abc7f80d9" name="ga950dedd481bcb1024279b78abc7f80d9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC2_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_ADC2_RELEASE_RESET</td></tr>
<tr class="memitem:ga05c6b7d579c500a86114a5e70421e154" id="r_ga05c6b7d579c500a86114a5e70421e154"><td class="memItemLeft" align="right" valign="top"><a id="ga05c6b7d579c500a86114a5e70421e154" name="ga05c6b7d579c500a86114a5e70421e154"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC3_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_ADC3_CLK_DISABLE</td></tr>
<tr class="memitem:ga96ef8d5f9623cc70e65c86d0806e3e86" id="r_ga96ef8d5f9623cc70e65c86d0806e3e86"><td class="memItemLeft" align="right" valign="top"><a id="ga96ef8d5f9623cc70e65c86d0806e3e86" name="ga96ef8d5f9623cc70e65c86d0806e3e86"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC3_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_ADC3_CLK_ENABLE</td></tr>
<tr class="memitem:gad312edcb949947577c55a2d45a9518ac" id="r_gad312edcb949947577c55a2d45a9518ac"><td class="memItemLeft" align="right" valign="top"><a id="gad312edcb949947577c55a2d45a9518ac" name="gad312edcb949947577c55a2d45a9518ac"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC3_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_ADC3_FORCE_RESET</td></tr>
<tr class="memitem:ga7a8f6b458fbba95a8649e1989b58eaf5" id="r_ga7a8f6b458fbba95a8649e1989b58eaf5"><td class="memItemLeft" align="right" valign="top"><a id="ga7a8f6b458fbba95a8649e1989b58eaf5" name="ga7a8f6b458fbba95a8649e1989b58eaf5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC3_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_ADC3_RELEASE_RESET</td></tr>
<tr class="memitem:gafed074f52db05d4c07cf496232bb3153" id="r_gafed074f52db05d4c07cf496232bb3153"><td class="memItemLeft" align="right" valign="top"><a id="gafed074f52db05d4c07cf496232bb3153" name="gafed074f52db05d4c07cf496232bb3153"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__AES_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_AES_CLK_DISABLE</td></tr>
<tr class="memitem:ga0c5aad08bba28d384dc7e1181fee6b67" id="r_ga0c5aad08bba28d384dc7e1181fee6b67"><td class="memItemLeft" align="right" valign="top"><a id="ga0c5aad08bba28d384dc7e1181fee6b67" name="ga0c5aad08bba28d384dc7e1181fee6b67"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__AES_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_AES_CLK_ENABLE</td></tr>
<tr class="memitem:ga709b3ad783f3e2b16fe5f07cf5cd9ad9" id="r_ga709b3ad783f3e2b16fe5f07cf5cd9ad9"><td class="memItemLeft" align="right" valign="top"><a id="ga709b3ad783f3e2b16fe5f07cf5cd9ad9" name="ga709b3ad783f3e2b16fe5f07cf5cd9ad9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__AES_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_AES_CLK_SLEEP_DISABLE</td></tr>
<tr class="memitem:gab14654c7c6b702e39853f88b35228b3d" id="r_gab14654c7c6b702e39853f88b35228b3d"><td class="memItemLeft" align="right" valign="top"><a id="gab14654c7c6b702e39853f88b35228b3d" name="gab14654c7c6b702e39853f88b35228b3d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__AES_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_AES_CLK_SLEEP_ENABLE</td></tr>
<tr class="memitem:ga1f40700201086bcf1ec079634db1a5e4" id="r_ga1f40700201086bcf1ec079634db1a5e4"><td class="memItemLeft" align="right" valign="top"><a id="ga1f40700201086bcf1ec079634db1a5e4" name="ga1f40700201086bcf1ec079634db1a5e4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__AES_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_AES_FORCE_RESET</td></tr>
<tr class="memitem:ga223935e6b265768f91c37310d4f56205" id="r_ga223935e6b265768f91c37310d4f56205"><td class="memItemLeft" align="right" valign="top"><a id="ga223935e6b265768f91c37310d4f56205" name="ga223935e6b265768f91c37310d4f56205"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__AES_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_AES_RELEASE_RESET</td></tr>
<tr class="memitem:ga639e05198e1aa4cf5e2f811cfd5478a9" id="r_ga639e05198e1aa4cf5e2f811cfd5478a9"><td class="memItemLeft" align="right" valign="top"><a id="ga639e05198e1aa4cf5e2f811cfd5478a9" name="ga639e05198e1aa4cf5e2f811cfd5478a9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CRYP_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_CRYP_CLK_SLEEP_ENABLE</td></tr>
<tr class="memitem:gac488d20c2d3434a03757a62b47688854" id="r_gac488d20c2d3434a03757a62b47688854"><td class="memItemLeft" align="right" valign="top"><a id="gac488d20c2d3434a03757a62b47688854" name="gac488d20c2d3434a03757a62b47688854"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CRYP_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_CRYP_CLK_SLEEP_DISABLE</td></tr>
<tr class="memitem:ga044bf8666afaa469662c187c65807fd9" id="r_ga044bf8666afaa469662c187c65807fd9"><td class="memItemLeft" align="right" valign="top"><a id="ga044bf8666afaa469662c187c65807fd9" name="ga044bf8666afaa469662c187c65807fd9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CRYP_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_CRYP_CLK_ENABLE</td></tr>
<tr class="memitem:gaab68329f44bc446bbfa67aa7328f28d5" id="r_gaab68329f44bc446bbfa67aa7328f28d5"><td class="memItemLeft" align="right" valign="top"><a id="gaab68329f44bc446bbfa67aa7328f28d5" name="gaab68329f44bc446bbfa67aa7328f28d5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CRYP_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_CRYP_CLK_DISABLE</td></tr>
<tr class="memitem:ga01c73ed1328524317b1a87b0c65a8b8a" id="r_ga01c73ed1328524317b1a87b0c65a8b8a"><td class="memItemLeft" align="right" valign="top"><a id="ga01c73ed1328524317b1a87b0c65a8b8a" name="ga01c73ed1328524317b1a87b0c65a8b8a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CRYP_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_CRYP_FORCE_RESET</td></tr>
<tr class="memitem:ga0bfbfb4f9ecc493c450fb949d53c304d" id="r_ga0bfbfb4f9ecc493c450fb949d53c304d"><td class="memItemLeft" align="right" valign="top"><a id="ga0bfbfb4f9ecc493c450fb949d53c304d" name="ga0bfbfb4f9ecc493c450fb949d53c304d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CRYP_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_CRYP_RELEASE_RESET</td></tr>
<tr class="memitem:ga35e6ac63d013180c4eb9505f3d2b6bc0" id="r_ga35e6ac63d013180c4eb9505f3d2b6bc0"><td class="memItemLeft" align="right" valign="top"><a id="ga35e6ac63d013180c4eb9505f3d2b6bc0" name="ga35e6ac63d013180c4eb9505f3d2b6bc0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>__AFIO_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_AFIO_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__AFIO_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_AFIO_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__AFIO_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_AFIO_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__AFIO_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_AFIO_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__AHB_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_AHB_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__AHB_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_AHB_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__AHB1_FORCE_RESET</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#ga87d828d91e67aaa931853a60779826c2">__HAL_RCC_AHB1_FORCE_RESET</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__AHB1_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_AHB1_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__AHB2_FORCE_RESET</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#gae82cd541f933be46ec8d6c3ea50d402c">__HAL_RCC_AHB2_FORCE_RESET</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__AHB2_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_AHB2_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__AHB3_FORCE_RESET</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#ga230a57ed6c129076b4fd17bdb07d79f6">__HAL_RCC_AHB3_FORCE_RESET</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__AHB3_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_AHB3_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__APB1_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_APB1_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__APB1_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_APB1_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__APB2_FORCE_RESET</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#ga8788da8c644ad0cc54912baede7d49b4">__HAL_RCC_APB2_FORCE_RESET</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__APB2_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_APB2_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__BKP_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_BKP_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__BKP_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_BKP_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__BKP_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_BKP_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__BKP_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_BKP_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CAN1_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_CAN1_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CAN1_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_CAN1_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CAN1_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_CAN1_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CAN1_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_CAN1_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CAN1_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_CAN1_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CAN1_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_CAN1_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CAN_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_CAN1_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CAN_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_CAN1_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CAN_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_CAN1_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CAN_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_CAN1_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CAN2_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_CAN2_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CAN2_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_CAN2_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CAN2_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_CAN2_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CAN2_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_CAN2_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CEC_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_CEC_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CEC_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_CEC_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__COMP_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_COMP_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__COMP_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_COMP_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__COMP_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_COMP_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__COMP_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_COMP_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__COMP_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_COMP_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__COMP_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_COMP_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CEC_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_CEC_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CEC_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_CEC_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CRC_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_CRC_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CRC_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_CRC_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CRC_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_CRC_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CRC_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_CRC_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CRC_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_CRC_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CRC_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_CRC_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DAC_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_DAC_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DAC_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_DAC_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DAC_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_DAC_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DAC_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_DAC_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DAC1_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_DAC1_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DAC1_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_DAC1_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DAC1_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_DAC1_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DAC1_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_DAC1_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DAC1_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_DAC1_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DAC1_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_DAC1_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DBGMCU_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_DBGMCU_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DBGMCU_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_DBGMCU_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DBGMCU_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_DBGMCU_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DBGMCU_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_DBGMCU_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DFSDM_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_DFSDM_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DFSDM_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_DFSDM_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DFSDM_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_DFSDM_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DFSDM_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_DFSDM_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DFSDM_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_DFSDM_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DFSDM_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_DFSDM_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA1_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_DMA1_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA1_CLK_ENABLE</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#ga49fc2c82ba0753e462ea8eb91c634a98">__HAL_RCC_DMA1_CLK_ENABLE</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA1_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_DMA1_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA1_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#ga568e4d004285fe009bc4e5d33e13af61">__HAL_RCC_DMA1_CLK_SLEEP_ENABLE</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA1_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_DMA1_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA1_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_DMA1_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA2_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_DMA2_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA2_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_DMA2_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA2_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_DMA2_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA2_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_DMA2_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA2_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_DMA2_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA2_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_DMA2_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ETHMAC_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_ETHMAC_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ETHMAC_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_ETHMAC_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ETHMAC_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_ETHMAC_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ETHMAC_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_ETHMAC_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ETHMACRX_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_ETHMACRX_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ETHMACRX_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_ETHMACRX_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ETHMACTX_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_ETHMACTX_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ETHMACTX_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_ETHMACTX_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FIREWALL_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_FIREWALL_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FIREWALL_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_FIREWALL_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FLASH_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_FLASH_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FLASH_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_FLASH_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FLASH_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_FLASH_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FLASH_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_FLASH_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FLASH_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_FLASH_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FLASH_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_FLASH_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FLITF_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_FLITF_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FLITF_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_FLITF_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FLITF_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_FLITF_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FLITF_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_FLITF_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FLITF_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_FLITF_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FLITF_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_FLITF_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FMC_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_FMC_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FMC_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_FMC_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FMC_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_FMC_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FMC_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_FMC_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FMC_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_FMC_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FMC_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_FMC_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FSMC_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_FSMC_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FSMC_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_FSMC_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOA_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOA_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOA_CLK_ENABLE</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#ga1fde58d775fd2458002df817a68f486e">__HAL_RCC_GPIOA_CLK_ENABLE</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOA_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOA_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOA_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#gaff8820b47bd3764e7cded76b9368460b">__HAL_RCC_GPIOA_CLK_SLEEP_ENABLE</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOA_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_GPIOA_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOA_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_GPIOA_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOB_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOB_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOB_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOB_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOB_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOB_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOB_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOB_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOB_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_GPIOB_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOB_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_GPIOB_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOC_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOC_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOC_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOC_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOC_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOC_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOC_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOC_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOC_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_GPIOC_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOC_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_GPIOC_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOD_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOD_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOD_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOD_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOD_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOD_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOD_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOD_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOD_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_GPIOD_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOD_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_GPIOD_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOE_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOE_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOE_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOE_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOE_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOE_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOE_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOE_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOE_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_GPIOE_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOE_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_GPIOE_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOF_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOF_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOF_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOF_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOF_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOF_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOF_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOF_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOF_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_GPIOF_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOF_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_GPIOF_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOG_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOG_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOG_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOG_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOG_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOG_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOG_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOG_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOG_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_GPIOG_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOG_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_GPIOG_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOH_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOH_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOH_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOH_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOH_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOH_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOH_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOH_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOH_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_GPIOH_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOH_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_GPIOH_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C1_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_I2C1_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C1_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_I2C1_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C1_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_I2C1_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C1_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_I2C1_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C1_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_I2C1_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C1_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_I2C1_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C2_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_I2C2_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C2_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_I2C2_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C2_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_I2C2_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C2_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_I2C2_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C2_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_I2C2_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C2_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_I2C2_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C3_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_I2C3_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C3_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_I2C3_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C3_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_I2C3_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C3_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_I2C3_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C3_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_I2C3_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C3_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_I2C3_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LCD_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_LCD_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LCD_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_LCD_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LCD_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_LCD_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LCD_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_LCD_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LCD_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_LCD_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LCD_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_LCD_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LPTIM1_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_LPTIM1_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LPTIM1_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_LPTIM1_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LPTIM1_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LPTIM1_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LPTIM1_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_LPTIM1_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LPTIM1_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_LPTIM1_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LPTIM2_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_LPTIM2_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LPTIM2_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_LPTIM2_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LPTIM2_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_LPTIM2_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LPTIM2_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_LPTIM2_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LPTIM2_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_LPTIM2_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LPTIM2_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_LPTIM2_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LPUART1_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_LPUART1_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LPUART1_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_LPUART1_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LPUART1_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_LPUART1_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LPUART1_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_LPUART1_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LPUART1_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_LPUART1_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LPUART1_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_LPUART1_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__OPAMP_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_OPAMP_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__OPAMP_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_OPAMP_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__OPAMP_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_OPAMP_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__OPAMP_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_OPAMP_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__OPAMP_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_OPAMP_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__OPAMP_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_OPAMP_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__OTGFS_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_OTGFS_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__OTGFS_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_OTGFS_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__OTGFS_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_OTGFS_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__OTGFS_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_OTGFS_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__OTGFS_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_OTGFS_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__OTGFS_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_OTGFS_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__PWR_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_PWR_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__PWR_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_PWR_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__PWR_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_PWR_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__PWR_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_PWR_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__PWR_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_PWR_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__PWR_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_PWR_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__QSPI_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_QSPI_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__QSPI_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_QSPI_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__QSPI_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_QSPI_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__QSPI_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_QSPI_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__QSPI_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_QSPI_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__QSPI_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_QSPI_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__RNG_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_RNG_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__RNG_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_RNG_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__RNG_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_RNG_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__RNG_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_RNG_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__RNG_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_RNG_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__RNG_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_RNG_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SAI1_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SAI1_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SAI1_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SAI1_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SAI1_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SAI1_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SAI1_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SAI1_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SAI1_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SAI1_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SAI1_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SAI1_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SAI2_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SAI2_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SAI2_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SAI2_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SAI2_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SAI2_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SAI2_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SAI2_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SAI2_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SAI2_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SAI2_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SAI2_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDIO_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SDIO_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDIO_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SDIO_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDMMC_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SDMMC_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDMMC_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SDMMC_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDMMC_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SDMMC_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDMMC_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SDMMC_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDMMC_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SDMMC_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDMMC_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SDMMC_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI1_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI1_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI1_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI1_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI1_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI1_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI1_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI1_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI1_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SPI1_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI1_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SPI1_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI2_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI2_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI2_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI2_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI2_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI2_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI2_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI2_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI2_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SPI2_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI2_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SPI2_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI3_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI3_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI3_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI3_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI3_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI3_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI3_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI3_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI3_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SPI3_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI3_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SPI3_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SRAM_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SRAM_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SRAM_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SRAM_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SRAM1_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SRAM1_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SRAM1_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SRAM1_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SRAM2_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SRAM2_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SRAM2_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SRAM2_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SWPMI1_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SWPMI1_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SWPMI1_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SWPMI1_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SWPMI1_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SWPMI1_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SWPMI1_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SWPMI1_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SWPMI1_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SWPMI1_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SWPMI1_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SWPMI1_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SYSCFG_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SYSCFG_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SYSCFG_CLK_ENABLE</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#gafc3ffcbb86e4913ae336ba094ca199e1">__HAL_RCC_SYSCFG_CLK_ENABLE</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SYSCFG_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SYSCFG_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#ga6e3a8ca9e554e3aa7aba57d034725655">__HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SYSCFG_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SYSCFG_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SYSCFG_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SYSCFG_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM1_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM1_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM1_CLK_ENABLE</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#gad693d7300ed7134b60bb1a645e762358">__HAL_RCC_TIM1_CLK_ENABLE</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM1_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM1_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM1_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#ga6ce02f1b2689c664010bebc2363d1db4">__HAL_RCC_TIM1_CLK_SLEEP_ENABLE</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM1_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM1_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM1_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM1_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM10_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM10_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM10_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM10_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM10_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM10_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM10_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM10_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM11_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM11_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM11_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM11_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM11_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM11_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM11_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM11_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM12_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM12_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM12_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM12_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM12_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM12_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM12_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM12_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM13_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM13_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM13_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM13_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM13_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM13_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM13_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM13_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM14_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM14_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM14_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM14_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM14_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM14_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM14_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM14_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM15_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM15_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM15_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM15_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM15_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM15_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM15_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM15_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM15_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM15_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM15_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM15_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM16_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM16_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM16_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM16_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM16_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM16_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM16_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM16_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM16_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM16_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM16_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM16_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM17_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM17_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM17_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM17_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM17_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM17_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM17_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM17_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM17_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM17_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM17_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM17_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM2_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM2_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM2_CLK_ENABLE</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#ga2e895257faa38376b9cdfcd756909a43">__HAL_RCC_TIM2_CLK_ENABLE</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM2_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM2_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM2_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#ga975142c90b4e1baf21b361524518235d">__HAL_RCC_TIM2_CLK_SLEEP_ENABLE</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM2_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM2_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM2_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM2_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM3_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM3_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM3_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM3_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM3_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM3_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM3_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM3_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM3_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM3_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM3_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM3_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM4_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM4_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM4_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM4_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM4_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM4_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM4_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM4_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM4_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM4_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM4_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM4_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM5_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM5_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM5_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM5_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM5_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM5_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM5_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM5_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM5_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM5_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM5_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM5_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM6_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM6_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM6_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM6_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM6_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM6_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM6_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM6_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM6_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM6_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM6_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM6_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM7_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM7_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM7_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM7_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM7_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM7_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM7_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM7_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM7_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM7_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM7_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM7_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM8_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM8_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM8_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM8_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM8_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM8_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM8_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM8_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM8_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM8_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM8_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM8_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM9_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM9_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM9_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM9_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM9_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM9_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM9_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM9_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TSC_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TSC_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TSC_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TSC_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TSC_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TSC_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TSC_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TSC_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TSC_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TSC_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TSC_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TSC_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART4_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_UART4_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART4_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_UART4_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART4_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_UART4_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART4_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_UART4_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART4_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_UART4_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART4_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_UART4_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART5_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_UART5_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART5_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_UART5_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART5_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_UART5_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART5_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_UART5_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART5_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_UART5_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART5_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_UART5_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART1_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_USART1_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART1_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_USART1_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART1_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_USART1_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART1_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_USART1_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART1_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_USART1_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART1_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_USART1_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART2_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_USART2_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART2_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_USART2_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART2_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_USART2_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART2_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_USART2_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART2_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_USART2_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART2_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_USART2_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART3_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_USART3_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART3_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_USART3_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART3_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_USART3_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART3_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_USART3_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART3_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_USART3_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART3_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_USART3_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART4_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_UART4_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART4_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_UART4_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART4_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_UART4_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART4_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_UART4_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART4_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_UART4_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART4_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_UART4_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART5_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_UART5_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART5_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_UART5_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART5_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_UART5_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART5_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_UART5_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART5_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_UART5_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART5_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_UART5_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART7_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_UART7_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART7_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_UART7_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART7_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_UART7_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART7_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_UART7_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART8_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_UART8_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART8_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_UART8_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART8_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_UART8_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART8_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_UART8_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USB_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_USB_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USB_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_USB_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USB_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_USB_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USB_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_USB_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USB_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_USB_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USB_OTG_FS_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_FS_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USB_OTG_FS_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_FS_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USB_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_USB_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__WWDG_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_WWDG_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__WWDG_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_WWDG_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__WWDG_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_WWDG_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__WWDG_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_WWDG_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__WWDG_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_WWDG_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__WWDG_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_WWDG_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM21_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM21_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM21_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM21_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM21_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM21_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM21_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM21_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM21_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM21_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM21_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM21_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM22_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM22_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM22_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM22_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM22_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM22_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM22_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM22_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM22_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM22_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM22_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM22_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CRS_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_CRS_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CRS_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_CRS_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CRS_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_CRS_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CRS_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_CRS_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CRS_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_CRS_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CRS_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_CRS_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__RCC_BACKUPRESET_FORCE</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#ga3bf7da608ff985873ca8e248fb1dc4f0">__HAL_RCC_BACKUPRESET_FORCE</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__RCC_BACKUPRESET_RELEASE</b>&#160;&#160;&#160;__HAL_RCC_BACKUPRESET_RELEASE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USB_OTG_FS_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_FS_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USB_OTG_FS_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_FS_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USB_OTG_FS_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USB_OTG_FS_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USB_OTG_HS_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_HS_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USB_OTG_HS_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_HS_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USB_OTG_HS_ULPI_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USB_OTG_HS_ULPI_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM9_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM9_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM9_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM9_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM10_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM10_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM10_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM10_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM11_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM11_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM11_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM11_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ETHMACPTP_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ETHMACPTP_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ETHMACPTP_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_ETHMACPTP_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ETHMACPTP_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_ETHMACPTP_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HASH_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_HASH_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HASH_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_HASH_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HASH_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_HASH_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HASH_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_HASH_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HASH_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_HASH_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HASH_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_HASH_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI5_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI5_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI5_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI5_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI5_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SPI5_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI5_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SPI5_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI5_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI5_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI5_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI5_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI6_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI6_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI6_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI6_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI6_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SPI6_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI6_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SPI6_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI6_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI6_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI6_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI6_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LTDC_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_LTDC_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LTDC_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_LTDC_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LTDC_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_LTDC_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LTDC_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_LTDC_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__LTDC_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_LTDC_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ETHMAC_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ETHMAC_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ETHMACTX_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ETHMACTX_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ETHMACRX_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ETHMACRX_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM12_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM12_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM12_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM12_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM13_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM13_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM13_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM13_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM14_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM14_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM14_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM14_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__BKPSRAM_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_BKPSRAM_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__BKPSRAM_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_BKPSRAM_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__BKPSRAM_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__BKPSRAM_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CCMDATARAMEN_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_CCMDATARAMEN_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CCMDATARAMEN_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_CCMDATARAMEN_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART6_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_USART6_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART6_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_USART6_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART6_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_USART6_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART6_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_USART6_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART6_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_USART6_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART6_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_USART6_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI4_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI4_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI4_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI4_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI4_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SPI4_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI4_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SPI4_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI4_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI4_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI4_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SPI4_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOI_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOI_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOI_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOI_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOI_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_GPIOI_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOI_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_GPIOI_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOI_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOI_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOI_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOI_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOJ_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOJ_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOJ_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOJ_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOJ_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_GPIOJ_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOJ_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_GPIOJ_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOJ_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOJ_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOK_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOK_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOK_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOK_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOK_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_GPIOK_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOK_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOK_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOK_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_GPIOK_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ETH_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_ETH_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ETH_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_ETH_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DCMI_CLK_ENABLE</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#ga16fbc8a6891716f91d96e23fd17c01e2">__HAL_RCC_DCMI_CLK_ENABLE</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DCMI_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_DCMI_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DCMI_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_DCMI_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DCMI_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_DCMI_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DCMI_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#gaf6fa397bcd717325032e3425fd424988">__HAL_RCC_DCMI_CLK_SLEEP_ENABLE</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DCMI_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_DCMI_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART7_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_UART7_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART7_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_UART7_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART7_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_UART7_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART7_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_UART7_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART7_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_UART7_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART7_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_UART7_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART8_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_UART8_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART8_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_UART8_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART8_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_UART8_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART8_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_UART8_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART8_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_UART8_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART8_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_UART8_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__OTGHS_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__OTGHS_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__OTGHS_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_HS_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__OTGHS_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_HS_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__OTGHSULPI_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__OTGHSULPI_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_OTGHS_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_OTGHS_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_OTGHS_IS_CLK_SLEEP_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_OTGHS_IS_CLK_SLEEP_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_OTGHS_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_HS_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_OTGHS_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_HS_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SRAM3_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SRAM3_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CAN2_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_CAN2_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CAN2_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_CAN2_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DAC_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_DAC_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DAC_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_DAC_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC2_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_ADC2_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC2_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_ADC2_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC3_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_ADC3_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC3_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_ADC3_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FSMC_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_FSMC_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FSMC_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_FSMC_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FSMC_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_FSMC_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FSMC_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_FSMC_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDIO_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SDIO_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDIO_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SDIO_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDIO_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SDIO_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDIO_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SDIO_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA2D_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_DMA2D_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA2D_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_DMA2D_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA2D_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_DMA2D_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA2D_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_DMA2D_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA2D_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_DMA2D_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA2D_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_DMA2D_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_OTGFS_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_FS_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_OTGFS_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_USB_OTG_FS_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC12_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_ADC12_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC12_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_ADC12_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC34_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_ADC34_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC34_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_ADC34_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DAC2_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_DAC2_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DAC2_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_DAC2_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM18_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM18_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM18_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM18_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM19_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM19_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM19_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM19_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM20_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM20_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM20_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_TIM20_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HRTIM1_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_HRTIM1_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HRTIM1_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_HRTIM1_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDADC1_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SDADC1_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDADC2_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SDADC2_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDADC3_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_SDADC3_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDADC1_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SDADC1_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDADC2_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SDADC2_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDADC3_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_SDADC3_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC12_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_ADC12_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC12_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_ADC12_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC34_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_ADC34_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC34_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_ADC34_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DAC2_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_DAC2_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DAC2_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_DAC2_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM18_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM18_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM18_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM18_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM19_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM19_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM19_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM19_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM20_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM20_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM20_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_TIM20_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HRTIM1_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_HRTIM1_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HRTIM1_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_HRTIM1_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDADC1_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SDADC1_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDADC2_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SDADC2_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDADC3_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SDADC3_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDADC1_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SDADC1_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDADC2_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SDADC2_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDADC3_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_SDADC3_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC1_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_ADC1_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC1_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_ADC1_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC12_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_ADC12_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC12_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_ADC12_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC34_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_ADC34_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__ADC34_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_ADC34_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CEC_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_CEC_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CEC_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_CEC_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CRC_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_CRC_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__CRC_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_CRC_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DAC1_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_DAC1_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DAC1_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_DAC1_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DAC2_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_DAC2_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DAC2_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_DAC2_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA1_IS_CLK_ENABLED</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#gaab05e603c9cadd72e4b6397837b46cef">__HAL_RCC_DMA1_IS_CLK_ENABLED</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA1_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_DMA1_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA2_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_DMA2_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__DMA2_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_DMA2_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FLITF_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_FLITF_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FLITF_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_FLITF_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FMC_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_FMC_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__FMC_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_FMC_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOA_IS_CLK_ENABLED</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#gad1edbd9407c814110f04c1a609a214e4">__HAL_RCC_GPIOA_IS_CLK_ENABLED</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOA_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_GPIOA_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOB_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_GPIOB_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOB_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_GPIOB_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOC_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_GPIOC_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOC_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_GPIOC_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOD_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_GPIOD_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOD_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_GPIOD_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOE_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_GPIOE_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOE_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_GPIOE_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOF_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_GPIOF_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOF_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_GPIOF_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOG_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_GPIOG_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOG_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_GPIOG_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOH_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_GPIOH_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__GPIOH_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_GPIOH_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HRTIM1_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_HRTIM1_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HRTIM1_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_HRTIM1_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C1_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_I2C1_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C1_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_I2C1_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C2_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_I2C2_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C2_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_I2C2_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C3_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_I2C3_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__I2C3_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_I2C3_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__PWR_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_PWR_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__PWR_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_PWR_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SYSCFG_IS_CLK_ENABLED</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#gad1ea95d1d5f3a2ecf2b903c4ed22e7c6">__HAL_RCC_SYSCFG_IS_CLK_ENABLED</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SYSCFG_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_SYSCFG_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI1_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_SPI1_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI1_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_SPI1_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI2_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_SPI2_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI2_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_SPI2_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI3_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_SPI3_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI3_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_SPI3_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI4_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_SPI4_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SPI4_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_SPI4_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDADC1_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_SDADC1_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDADC1_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_SDADC1_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDADC2_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_SDADC2_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDADC2_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_SDADC2_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDADC3_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_SDADC3_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SDADC3_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_SDADC3_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SRAM_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_SRAM_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__SRAM_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_SRAM_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM1_IS_CLK_ENABLED</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#gad2b7c3a381d791c4ee728e303935832a">__HAL_RCC_TIM1_IS_CLK_ENABLED</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM1_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM1_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM2_IS_CLK_ENABLED</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___exported___macros.html#gadee5016adb1c8b62a5bb05f055859de0">__HAL_RCC_TIM2_IS_CLK_ENABLED</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM2_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM2_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM3_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM3_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM3_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM3_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM4_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM4_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM4_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM4_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM5_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM5_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM5_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM5_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM6_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM6_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM6_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM6_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM7_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM7_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM7_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM7_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM8_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM8_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM8_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM8_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM12_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM12_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM12_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM12_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM13_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM13_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM13_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM13_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM14_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM14_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM14_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM14_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM15_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM15_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM15_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM15_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM16_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM16_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM16_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM16_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM17_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM17_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM17_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM17_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM18_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM18_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM18_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM18_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM19_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM19_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM19_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM19_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM20_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM20_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TIM20_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_TIM20_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TSC_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_TSC_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__TSC_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_TSC_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART4_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_UART4_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART4_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_UART4_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART5_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_UART5_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__UART5_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_UART5_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART1_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_USART1_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART1_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_USART1_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART2_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_USART2_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART2_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_USART2_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART3_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_USART3_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USART3_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_USART3_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USB_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_USB_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__USB_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_USB_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__WWDG_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_WWDG_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__WWDG_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_WWDG_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_I2SCLK</b>&#160;&#160;&#160;__HAL_RCC_I2S_CONFIG</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_I2SCLK_CONFIG</b>&#160;&#160;&#160;__HAL_RCC_I2S_CONFIG</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__RCC_PLLSRC</b>&#160;&#160;&#160;RCC_GET_PLL_OSCSOURCE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_RCC_MSIRANGE</b>&#160;&#160;&#160;IS_RCC_MSI_CLOCK_RANGE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_RCC_RTCCLK_SOURCE</b>&#160;&#160;&#160;IS_RCC_RTCCLKSOURCE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_RCC_SYSCLK_DIV</b>&#160;&#160;&#160;IS_RCC_HCLK</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_RCC_HCLK_DIV</b>&#160;&#160;&#160;IS_RCC_PCLK</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_RCC_PERIPHCLK</b>&#160;&#160;&#160;IS_RCC_PERIPHCLOCK</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_IT_HSI14</b>&#160;&#160;&#160;RCC_IT_HSI14RDY</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_IT_CSSLSE</b>&#160;&#160;&#160;RCC_IT_LSECSS</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_IT_CSSHSE</b>&#160;&#160;&#160;RCC_IT_CSS</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLLMUL_3</b>&#160;&#160;&#160;RCC_PLL_MUL3</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLLMUL_4</b>&#160;&#160;&#160;RCC_PLL_MUL4</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLLMUL_6</b>&#160;&#160;&#160;RCC_PLL_MUL6</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLLMUL_8</b>&#160;&#160;&#160;RCC_PLL_MUL8</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLLMUL_12</b>&#160;&#160;&#160;RCC_PLL_MUL12</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLLMUL_16</b>&#160;&#160;&#160;RCC_PLL_MUL16</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLLMUL_24</b>&#160;&#160;&#160;RCC_PLL_MUL24</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLLMUL_32</b>&#160;&#160;&#160;RCC_PLL_MUL32</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLLMUL_48</b>&#160;&#160;&#160;RCC_PLL_MUL48</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLLDIV_2</b>&#160;&#160;&#160;RCC_PLL_DIV2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLLDIV_3</b>&#160;&#160;&#160;RCC_PLL_DIV3</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PLLDIV_4</b>&#160;&#160;&#160;RCC_PLL_DIV4</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_RCC_MCOSOURCE</b>&#160;&#160;&#160;IS_RCC_MCO1SOURCE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_MCO_CONFIG</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___m_c_ox___clock___config.html#ga7e5f7f1efc92794b6f0e96068240b45e">__HAL_RCC_MCO1_CONFIG</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCO_NODIV</b>&#160;&#160;&#160;RCC_MCODIV_1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCO_DIV1</b>&#160;&#160;&#160;RCC_MCODIV_1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCO_DIV2</b>&#160;&#160;&#160;RCC_MCODIV_2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCO_DIV4</b>&#160;&#160;&#160;RCC_MCODIV_4</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCO_DIV8</b>&#160;&#160;&#160;RCC_MCODIV_8</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCO_DIV16</b>&#160;&#160;&#160;RCC_MCODIV_16</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCO_DIV32</b>&#160;&#160;&#160;RCC_MCODIV_32</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCO_DIV64</b>&#160;&#160;&#160;RCC_MCODIV_64</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCO_DIV128</b>&#160;&#160;&#160;RCC_MCODIV_128</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCOSOURCE_NONE</b>&#160;&#160;&#160;RCC_MCO1SOURCE_NOCLOCK</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCOSOURCE_LSI</b>&#160;&#160;&#160;RCC_MCO1SOURCE_LSI</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCOSOURCE_LSE</b>&#160;&#160;&#160;RCC_MCO1SOURCE_LSE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCOSOURCE_SYSCLK</b>&#160;&#160;&#160;RCC_MCO1SOURCE_SYSCLK</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCOSOURCE_HSI</b>&#160;&#160;&#160;RCC_MCO1SOURCE_HSI</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCOSOURCE_HSI14</b>&#160;&#160;&#160;RCC_MCO1SOURCE_HSI14</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCOSOURCE_HSI48</b>&#160;&#160;&#160;RCC_MCO1SOURCE_HSI48</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCOSOURCE_HSE</b>&#160;&#160;&#160;RCC_MCO1SOURCE_HSE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCOSOURCE_PLLCLK_DIV1</b>&#160;&#160;&#160;RCC_MCO1SOURCE_PLLCLK</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCOSOURCE_PLLCLK_NODIV</b>&#160;&#160;&#160;RCC_MCO1SOURCE_PLLCLK</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_MCOSOURCE_PLLCLK_DIV2</b>&#160;&#160;&#160;RCC_MCO1SOURCE_PLLCLK_DIV2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_RTCCLKSOURCE_NONE</b>&#160;&#160;&#160;RCC_RTCCLKSOURCE_NO_CLK</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USBCLK_PLLSAI1</b>&#160;&#160;&#160;RCC_USBCLKSOURCE_PLLSAI1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USBCLK_PLL</b>&#160;&#160;&#160;RCC_USBCLKSOURCE_PLL</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USBCLK_MSI</b>&#160;&#160;&#160;RCC_USBCLKSOURCE_MSI</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USBCLKSOURCE_PLLCLK</b>&#160;&#160;&#160;RCC_USBCLKSOURCE_PLL</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USBPLLCLK_DIV1</b>&#160;&#160;&#160;RCC_USBCLKSOURCE_PLL</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USBPLLCLK_DIV1_5</b>&#160;&#160;&#160;RCC_USBCLKSOURCE_PLL_DIV1_5</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USBPLLCLK_DIV2</b>&#160;&#160;&#160;RCC_USBCLKSOURCE_PLL_DIV2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_USBPLLCLK_DIV3</b>&#160;&#160;&#160;RCC_USBCLKSOURCE_PLL_DIV3</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>HSION_BitNumber</b>&#160;&#160;&#160;RCC_HSION_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>HSION_BITNUMBER</b>&#160;&#160;&#160;RCC_HSION_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>HSEON_BitNumber</b>&#160;&#160;&#160;RCC_HSEON_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>HSEON_BITNUMBER</b>&#160;&#160;&#160;RCC_HSEON_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>MSION_BITNUMBER</b>&#160;&#160;&#160;RCC_MSION_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CSSON_BitNumber</b>&#160;&#160;&#160;RCC_CSSON_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CSSON_BITNUMBER</b>&#160;&#160;&#160;RCC_CSSON_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PLLON_BitNumber</b>&#160;&#160;&#160;RCC_PLLON_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PLLON_BITNUMBER</b>&#160;&#160;&#160;RCC_PLLON_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PLLI2SON_BitNumber</b>&#160;&#160;&#160;RCC_PLLI2SON_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>I2SSRC_BitNumber</b>&#160;&#160;&#160;RCC_I2SSRC_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RTCEN_BitNumber</b>&#160;&#160;&#160;RCC_RTCEN_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RTCEN_BITNUMBER</b>&#160;&#160;&#160;RCC_RTCEN_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>BDRST_BitNumber</b>&#160;&#160;&#160;RCC_BDRST_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>BDRST_BITNUMBER</b>&#160;&#160;&#160;RCC_BDRST_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RTCRST_BITNUMBER</b>&#160;&#160;&#160;RCC_RTCRST_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>LSION_BitNumber</b>&#160;&#160;&#160;RCC_LSION_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>LSION_BITNUMBER</b>&#160;&#160;&#160;RCC_LSION_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>LSEON_BitNumber</b>&#160;&#160;&#160;RCC_LSEON_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>LSEON_BITNUMBER</b>&#160;&#160;&#160;RCC_LSEON_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>LSEBYP_BITNUMBER</b>&#160;&#160;&#160;RCC_LSEBYP_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>PLLSAION_BitNumber</b>&#160;&#160;&#160;RCC_PLLSAION_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>TIMPRE_BitNumber</b>&#160;&#160;&#160;RCC_TIMPRE_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RMVF_BitNumber</b>&#160;&#160;&#160;RCC_RMVF_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RMVF_BITNUMBER</b>&#160;&#160;&#160;RCC_RMVF_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_CR2_HSI14TRIM_BitNumber</b>&#160;&#160;&#160;RCC_HSI14TRIM_BIT_NUMBER</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CR_BYTE2_ADDRESS</b>&#160;&#160;&#160;RCC_CR_BYTE2_ADDRESS</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CIR_BYTE1_ADDRESS</b>&#160;&#160;&#160;RCC_CIR_BYTE1_ADDRESS</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CIR_BYTE2_ADDRESS</b>&#160;&#160;&#160;RCC_CIR_BYTE2_ADDRESS</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>BDCR_BYTE0_ADDRESS</b>&#160;&#160;&#160;RCC_BDCR_BYTE0_ADDRESS</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DBP_TIMEOUT_VALUE</b>&#160;&#160;&#160;RCC_DBP_TIMEOUT_VALUE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>LSE_TIMEOUT_VALUE</b>&#160;&#160;&#160;RCC_LSE_TIMEOUT_VALUE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CR_HSION_BB</b>&#160;&#160;&#160;RCC_CR_HSION_BB</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CR_CSSON_BB</b>&#160;&#160;&#160;RCC_CR_CSSON_BB</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CR_PLLON_BB</b>&#160;&#160;&#160;RCC_CR_PLLON_BB</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CR_PLLI2SON_BB</b>&#160;&#160;&#160;RCC_CR_PLLI2SON_BB</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CR_MSION_BB</b>&#160;&#160;&#160;RCC_CR_MSION_BB</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CSR_LSION_BB</b>&#160;&#160;&#160;RCC_CSR_LSION_BB</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CSR_LSEON_BB</b>&#160;&#160;&#160;RCC_CSR_LSEON_BB</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CSR_LSEBYP_BB</b>&#160;&#160;&#160;RCC_CSR_LSEBYP_BB</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CSR_RTCEN_BB</b>&#160;&#160;&#160;RCC_CSR_RTCEN_BB</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CSR_RTCRST_BB</b>&#160;&#160;&#160;RCC_CSR_RTCRST_BB</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CFGR_I2SSRC_BB</b>&#160;&#160;&#160;RCC_CFGR_I2SSRC_BB</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>BDCR_RTCEN_BB</b>&#160;&#160;&#160;RCC_BDCR_RTCEN_BB</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>BDCR_BDRST_BB</b>&#160;&#160;&#160;RCC_BDCR_BDRST_BB</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CR_HSEON_BB</b>&#160;&#160;&#160;RCC_CR_HSEON_BB</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CSR_RMVF_BB</b>&#160;&#160;&#160;RCC_CSR_RMVF_BB</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>CR_PLLSAION_BB</b>&#160;&#160;&#160;RCC_CR_PLLSAION_BB</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DCKCFGR_TIMPRE_BB</b>&#160;&#160;&#160;RCC_DCKCFGR_TIMPRE_BB</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_CRS_ENABLE_FREQ_ERROR_COUNTER</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___c_r_s___extended___features.html#ga59fe9365920d435138c487b85068cab0">__HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_CRS_DISABLE_FREQ_ERROR_COUNTER</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___c_r_s___extended___features.html#ga92d96e3857c138d9a313f74de163e833">__HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_CRS_ENABLE_AUTOMATIC_CALIB</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___c_r_s___extended___features.html#gabed68fe74d544b1c602aa5a22a7af786">__HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_CRS_DISABLE_AUTOMATIC_CALIB</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___c_r_s___extended___features.html#ga1a3b49219a5d79ba0688074b56d33122">__HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_CRS_CALCULATE_RELOADVALUE</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___c_r_s___extended___features.html#ga5c48aa81c5416362a3cbb499754754a1">__HAL_RCC_CRS_RELOADVALUE_CALCULATE</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_GET_IT_SOURCE</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c___flags___interrupts___management.html#ga134af980b892f362c05ae21922cd828d">__HAL_RCC_GET_IT</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_CRS_SYNCWARM</b>&#160;&#160;&#160;RCC_CRS_SYNCWARN</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_CRS_TRIMOV</b>&#160;&#160;&#160;RCC_CRS_TRIMOVF</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_CK48</b>&#160;&#160;&#160;RCC_PERIPHCLK_CLK48</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_CK48CLKSOURCE_PLLQ</b>&#160;&#160;&#160;RCC_CLK48CLKSOURCE_PLLQ</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_CK48CLKSOURCE_PLLSAIP</b>&#160;&#160;&#160;RCC_CLK48CLKSOURCE_PLLSAIP</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_CK48CLKSOURCE_PLLI2SQ</b>&#160;&#160;&#160;RCC_CLK48CLKSOURCE_PLLI2SQ</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>IS_RCC_CK48CLKSOURCE</b>&#160;&#160;&#160;IS_RCC_CLK48CLKSOURCE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SDIOCLKSOURCE_CK48</b>&#160;&#160;&#160;RCC_SDIOCLKSOURCE_CLK48</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_DFSDM_CLK_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_DFSDM1_CLK_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_DFSDM_CLK_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_DFSDM1_CLK_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_DFSDM_IS_CLK_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_DFSDM1_IS_CLK_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_DFSDM_IS_CLK_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_DFSDM1_IS_CLK_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_DFSDM_FORCE_RESET</b>&#160;&#160;&#160;__HAL_RCC_DFSDM1_FORCE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_DFSDM_RELEASE_RESET</b>&#160;&#160;&#160;__HAL_RCC_DFSDM1_RELEASE_RESET</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_DFSDM_CLK_SLEEP_ENABLE</b>&#160;&#160;&#160;__HAL_RCC_DFSDM1_CLK_SLEEP_ENABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_DFSDM_CLK_SLEEP_DISABLE</b>&#160;&#160;&#160;__HAL_RCC_DFSDM1_CLK_SLEEP_DISABLE</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_DFSDM_IS_CLK_SLEEP_ENABLED</b>&#160;&#160;&#160;__HAL_RCC_DFSDM1_IS_CLK_SLEEP_ENABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_DFSDM_IS_CLK_SLEEP_DISABLED</b>&#160;&#160;&#160;__HAL_RCC_DFSDM1_IS_CLK_SLEEP_DISABLED</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>DfsdmClockSelection</b>&#160;&#160;&#160;Dfsdm1ClockSelection</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_PERIPHCLK_DFSDM</b>&#160;&#160;&#160;RCC_PERIPHCLK_DFSDM1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_DFSDMCLKSOURCE_PCLK</b>&#160;&#160;&#160;RCC_DFSDM1CLKSOURCE_PCLK2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_DFSDMCLKSOURCE_SYSCLK</b>&#160;&#160;&#160;RCC_DFSDM1CLKSOURCE_SYSCLK</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_DFSDM_CONFIG</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga79c4e732154d11fb10e6b5752ab31fc4">__HAL_RCC_DFSDM1_CONFIG</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>__HAL_RCC_GET_DFSDM_SOURCE</b>&#160;&#160;&#160;<a class="el" href="group___r_c_c_ex___exported___macros.html#ga5bd849cb75a56ae9a27a164e7d3c8575">__HAL_RCC_GET_DFSDM1_SOURCE</a></td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_DFSDM1CLKSOURCE_PCLK</b>&#160;&#160;&#160;RCC_DFSDM1CLKSOURCE_PCLK2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_SWPMI1CLKSOURCE_PCLK</b>&#160;&#160;&#160;RCC_SWPMI1CLKSOURCE_PCLK1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM1CLKSOURCE_PCLK</b>&#160;&#160;&#160;RCC_LPTIM1CLKSOURCE_PCLK1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_LPTIM2CLKSOURCE_PCLK</b>&#160;&#160;&#160;RCC_LPTIM2CLKSOURCE_PCLK1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1</b>&#160;&#160;&#160;RCC_DFSDM1AUDIOCLKSOURCE_I2S1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2</b>&#160;&#160;&#160;RCC_DFSDM1AUDIOCLKSOURCE_I2S2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_DFSDM2AUDIOCLKSOURCE_I2SAPB1</b>&#160;&#160;&#160;RCC_DFSDM2AUDIOCLKSOURCE_I2S1</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_DFSDM2AUDIOCLKSOURCE_I2SAPB2</b>&#160;&#160;&#160;RCC_DFSDM2AUDIOCLKSOURCE_I2S2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_DFSDM1CLKSOURCE_APB2</b>&#160;&#160;&#160;RCC_DFSDM1CLKSOURCE_PCLK2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_DFSDM2CLKSOURCE_APB2</b>&#160;&#160;&#160;RCC_DFSDM2CLKSOURCE_PCLK2</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><b>RCC_FMPI2C1CLKSOURCE_APB</b>&#160;&#160;&#160;RCC_FMPI2C1CLKSOURCE_PCLK1</td></tr>
</table>
<a name="details" id="details"></a><h2 id="header-details" class="groupheader">Detailed Description</h2>
<a name="doc-define-members" id="doc-define-members"></a><h2 id="header-doc-define-members" class="groupheader">Macro Definition Documentation</h2>
<a id="gac6eb1ec87a15e51601d0957fdf17e870" name="gac6eb1ec87a15e51601d0957fdf17e870"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gac6eb1ec87a15e51601d0957fdf17e870">&#9670;&#160;</a></span>HAL_RC48_EnableBuffer_Cmd</h2>

<div class="memitem">
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        <tr>
          <td class="memname">#define HAL_RC48_EnableBuffer_Cmd</td>
          <td>(</td>
          <td class="paramtype"></td>          <td class="paramname"><span class="paramname"><em>cmd</em></span></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">                                        (((cmd)==ENABLE) ? \</div>
<div class="line">                                        HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT())</div>
</div><!-- fragment -->
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